It has been observed that, at least in some US semiconductor wafer fabs, while Work-In-Process in the fab may be very high, the bottleneck tools are underutilized (utilization less than 65%). In such cases, the fab's throughput is constrained not by a bottleneck tool, but rather by a virtual bottleneck. Obviously, when a virtual bottleneck occurs, the fab's true production capacity is not realized. Many common dispatch policies like waiting-for-a-full-batch at a furnace or avoiding-a-setup at an implanter, though locally optimal, can easily create virtual bottlenecks. In this talk, Professor Dai will first describe the virtual bottleneck phenomenon, and then discuss a few families of dispatch policies that avoid virtual bottlenecks.

Jim Dai is a professor at the Georgia Institute of Technology.  He received a B.S. in mathematics from Nanjing University in 1982, and a Ph.D. in applied probability from Stanford University in 1990. His research and consulting interests include stochastic networks, manufacturing systems, and supply chain management.  His recent awards include the Best Publication Award in 1997 and the Erlang Prize in 1998, both from the Applied Probability Society of INFORMS.